/**************************************************************************//**
 * @file     main.c
 * @version  V2.00
 * $Revision: 7 $
 * $Date: 14/11/27 7:10p $
 * @brief    Read/write EEPROM via an I2C interface.
 *
 * @note
 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
 *
 ******************************************************************************/
#include <stdio.h>
#include "Nano1X2Series.h"
#include "GPIO_IIC.h"
#include "hdmi2mipi.h"
#include "lcd_drv.h"

uint32_t oled_config;
#define DATA_FLASH_TEST_BASE        0x3000
#define DATA_FLASH_TEST_END         0x7000


//void SYS_Init(void)
//	{
//		/*---------------------------------------------------------------------------------------------------------*/
//		/* Init System Clock																					   */
//		/*---------------------------------------------------------------------------------------------------------*/
//		/* Unlock protected registers */
//		SYS_UnlockReg();
//	
//		/* Set HCLK source form HXT and HCLK source divide 1  */
//		CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT,CLK_HCLK_CLK_DIVIDER(1));
//	
//		/* Enable external 12MHz HXT, 32KHz LXT and HIRC */
//		CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk | CLK_PWRCTL_LXT_EN_Msk | CLK_PWRCTL_HIRC_EN_Msk);
//	
//		/* Waiting for clock ready */
//		CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk | CLK_CLKSTATUS_LXT_STB_Msk | CLK_CLKSTATUS_HIRC_STB_Msk);
//	
//		/*	Set HCLK frequency 32MHz */
//		CLK_SetCoreClock(32000000);
//	
//		/* Select IP clock source */
//		//CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HIRC, CLK_UART_CLK_DIVIDER(1));
//		CLK_SetModuleClock(I2C0_MODULE, 0, 0);
//		CLK_EnableModuleClock(I2C0_MODULE);
//	
//		/* Enable IP clock */
//		//CLK_EnableModuleClock(UART0_MODULE);
//		//CLK_EnableModuleClock(I2C0_MODULE);
//	
//		/* Update System Core Clock */
//		/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
//		SystemCoreClockUpdate();
//	
//		/*---------------------------------------------------------------------------------------------------------*/
//		/* Init I/O Multi-function																				   */
//		/*---------------------------------------------------------------------------------------------------------*/
//		/* Set PB multi-function pins for UART0 RXD and TXD  */
//		SYS->PB_L_MFP &= ~(SYS_PB_L_MFP_PB0_MFP_Msk | SYS_PB_L_MFP_PB1_MFP_Msk);
//		//SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB0_MFP_UART0_TX | SYS_PB_L_MFP_PB1_MFP_UART0_RX);
//	
//		/* Set multi function pin for I2C0 */
//		//SYS->PC_L_MFP = (SYS_PC_L_MFP_PC0_MFP_I2C0_SCL | SYS_PC_L_MFP_PC1_MFP_I2C0_SDA);
//		//SYS->PA_H_MFP &= ~(SYS_PA_H_MFP_PA12_MFP_Msk| SYS_PA_H_MFP_PA13_MFP_Msk);
//		SYS->PA_H_MFP |=(SYS_PA_H_MFP_PA12_MFP_I2C0_SCL| SYS_PA_H_MFP_PA13_MFP_I2C0_SDA);
//	
//		/* Lock protected registers */
//		SYS_LockReg();
//	}
void SYS_Init(void)
{
	/*---------------------------------------------------------------------------------------------------------*/
	/* Init System Clock																					   */
	/*---------------------------------------------------------------------------------------------------------*/
	/* Unlock protected registers */
	SYS_UnlockReg();

	/* Enable External XTAL (4~24 MHz) */
	CLK->PWRCTL |= (0x1 << CLK_PWRCTL_HXT_EN_Pos); // HXT Enabled

	/* Waiting for 12MHz clock ready */
	CLK_WaitClockReady( CLK_CLKSTATUS_HXT_STB_Msk);

	/* Switch HCLK clock source to XTAL */
	CLK->CLKSEL0 &= ~CLK_CLKSEL0_HCLK_S_Msk;
	CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_HXT;

	/* Enable IP clock */
	CLK_SetModuleClock(I2C0_MODULE, 0, 0);
	CLK_EnableModuleClock(I2C0_MODULE);
	//CLK->APBCLK |= CLK_APBCLK_UART0_EN; // UART0 Clock Enable
	//CLK->APBCLK |= CLK_APBCLK_UART1_EN; // UART1 Clock Enable

	/* Select IP clock source */
	//CLK->CLKSEL1 &= ~CLK_CLKSEL1_UART_S_Msk;
	//CLK->CLKSEL1 |= (0x0 << CLK_CLKSEL1_UART_S_Pos);// Clock source from external 12 MHz or 32 KHz crystal clock

	/* Update System Core Clock */
	/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
	SystemCoreClockUpdate();

	/*---------------------------------------------------------------------------------------------------------*/
	/* Init I/O Multi-function																				   */
	/*---------------------------------------------------------------------------------------------------------*/
	/* Set PB multi-function pins for UART0 RXD and TXD  */
	SYS->PB_L_MFP &= ~(SYS_PB_L_MFP_PB0_MFP_Msk|SYS_PB_L_MFP_PB1_MFP_Msk);
	//SYS->PB_L_MFP |=  (SYS_PB_L_MFP_PB0_MFP_UART0_TX|SYS_PB_L_MFP_PB1_MFP_UART0_RX);

	/* Set PB multi-function pins for UART1 RXD, TXD, RTS, CTS	*/
	//SYS->PB_L_MFP &= ~(SYS_PB_L_MFP_PB4_MFP_Msk | SYS_PB_L_MFP_PB5_MFP_Msk |
	//				   SYS_PB_L_MFP_PB6_MFP_Msk | SYS_PB_L_MFP_PB7_MFP_Msk);
	//SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB4_MFP_UART1_RTS | SYS_PB_L_MFP_PB5_MFP_UART1_RX |
	//				  SYS_PB_L_MFP_PB6_MFP_UART1_TX  | SYS_PB_L_MFP_PB7_MFP_UART1_CTS);

	SYS->PA_H_MFP &= ~(SYS_PA_H_MFP_PA12_MFP_Msk| SYS_PA_H_MFP_PA13_MFP_Msk);
	SYS->PA_H_MFP |=(SYS_PA_H_MFP_PA12_MFP_I2C0_SCL| SYS_PA_H_MFP_PA13_MFP_I2C0_SDA);

	/* Lock protected registers */
	SYS_LockReg();

}





static int  set_data_flash_base(uint32_t u32DFBA)
{
    uint32_t   au32Config[2];

    if (FMC_ReadConfig(au32Config, 2) < 0) {
        printf("\nRead User Config failed!\n");
        return -1;
    }

    if ((!(au32Config[0] & 0x1)) && (au32Config[1] == u32DFBA))
        return 0;

    FMC_ENABLE_CFG_UPDATE();

    au32Config[0] &= ~0x1;
    au32Config[1] = u32DFBA;

    if (FMC_WriteConfig(au32Config, 2) < 0)
        return -1;

   // printf("\nSet Data Flash base as 0x%x.\n", DATA_FLASH_TEST_BASE);

    // Perform chip reset to make new User Config take effect
    SYS->IPRST_CTL1 = SYS_IPRST_CTL1_CHIP_RST_Msk;
    return 0;
}

void save_config(uint32_t value)
{
	SYS_UnlockReg();
	//HDMI_init();
	FMC_Open();
	set_data_flash_base(DATA_FLASH_TEST_BASE);
	FMC_Erase(DATA_FLASH_TEST_BASE);
	FMC_Write(DATA_FLASH_TEST_BASE, value);
	
	FMC_Close();
	SYS_LockReg();

}

uint32_t read_config()
{
	uint32_t value;
	SYS_UnlockReg();
	//HDMI_init();
	FMC_Open();	
	value=FMC_Read(DATA_FLASH_TEST_BASE);
	
	FMC_Close();
	SYS_LockReg();
	return value;
}


#define MODE_2D	0
#define MODE_3D_FULL	1
#define MODE_3D_HALF	2

/*---------------------------------------------------------------------------------------------------------*/
/*  Main Function                                                                                          */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main (void)
{
  
	//uint8_t testbuf[20],add[2];
	uint8_t status_3d=MODE_2D;
	

    /* Init System, IP clock and multi-function I/O */
    SYS_Init();

    /* Init UART to 115200-8n1 for print message */
    //UART_Open(UART1, 115200);

    /*
        This sample code sets I2C bus clock to 100kHz. Then, accesses EEPROM 24LC64 with Byte Write
        and Byte Read operations, and check if the read data is equal to the programmed data.
    */
   // UART_DisableFlowCtrl(UART1);
   // UART_Write(UART1,"TEST",4);

   // printf("+-------------------------------------------------------+\n");
   // printf("|    Nano1x2 Series I2C Sample Code with EEPROM 24LC64  |\n");
   // printf("+-------------------------------------------------------+\n");

	GPIO_SetMode(PD, BIT14, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PD, BIT13, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PD, BIT9, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PD, BIT10, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PD, BIT7, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PD, BIT8, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PC, BIT4, GPIO_PMD_OUTPUT);
	GPIO_SetMode(PA, BIT2, GPIO_PMD_INPUT);
	
	SPI_init();
	CLK_SysTickDelay(3000);
	PD14=0;
	PD13=1;
	PD9=1;
	PD10=1;	//oled 10v
	PD7=0;	
	PD8=1;
	CLK_SysTickDelay(300);	
	PD7=1;
	PD13=1;
	CLK_SysTickDelay(300);
	PD13=0;	//hdmi reset	
	LVDS_i2c_init();
	
	i2c_init();
	set_data_flash_base(DATA_FLASH_TEST_BASE);
	
	
	//init_hdmi2mipi();
	
	
	HDMI_init();
	oled_config=read_config();
	if((oled_config&0xff000000)!=0x5a000000)
		{
			oled_config=0x5a050302;
			save_config(oled_config);
		}
	//RT5621_init();
	set_oledconfig(oled_config);

	//lum_config_l=20;
	
	
		


   PC4=1;//enable amp

	while(1)
		{
			if(PA2==0)
				{
					long time_count=0;
					
					while(PA2==0)
						{
							time_count++;
							CLK_SysTickDelay(30000);
							if(time_count>50)
							{
								if(status_3d==MODE_2D)
									{
										Switch_3D_fast(1);
										status_3d=MODE_3D_HALF;
									}
								else if(status_3d==MODE_3D_FULL)
								{
									Switch_3D(0);
									status_3d=MODE_2D;
								}
								else
									{
										Switch_3D_fast(0);
										status_3d=MODE_2D;
									}
								//set_oledconfig(oled_config);
								while(PA2==0);
							}
						}
					if(time_count>50)
						{
						}					
					else
						{
							if(status_3d==MODE_2D)
								{
									Switch_3D(1);
									status_3d=MODE_3D_FULL;
								}								
							else
								{
									Switch_3D(0);
									status_3d=MODE_2D;
								}
						}
					//set_oledconfig(oled_config);
				}

			if(PA6==0)
				{

					if((oled_config&0xff)<=5)						
						{
							oled_config++;
							set_oledconfig(oled_config);
							save_config(oled_config);
						}
					
						
					//LumChange(TRUE);
					while(PA6==0);
				}

			if(PA4==0)
				{
					//LumChange(FALSE);

					if((oled_config&0xff)>0)
						{
							oled_config--;
							set_oledconfig(oled_config);
							save_config(oled_config);
						}
					

					while(PA4==0);
				}
			
			CLK_SysTickDelay(3000);
			hdmi_monitor();

			
		}
  
}

/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/

